The present invention relates to video acquisition systems, and more particularly to a triggering and timing event architecture for a video acquisition system which provides deterministic response time for events while providing flexibility and configurability.
The problem of acquiring video data into computer system memory (i.e. the main memory of a computer system) is increasingly the subject of attention in the field of image/video processing. As the performance of software image processing increases in response to improvements in CPU capacity, it is increasingly necessary to provide for fast and efficient acquisition of video frames from video source devices. Typical video sources include industrial cameras, camcorders, video cameras, VCRs, TV tuners, and laserdisk players.
Typically, a host computer system employs a video acquisition board to perform video frame acquisition. A video acquisition board is generally equipped with (a) an analog video port for coupling to an analog video source, (b) an A/D converter, (c) a frame acquisition buffer [RAM], (d) a bus connection to the host system, and (e) a DMA controller. In addition, a video board is often equipped with a digital video port for coupling to a digital video source.
An analog video source provides an analog video signal to the video board via the analog video port. The analog video signal is organized as a stream of video frames with a typical rate of 30 frames per second. The video board employs the A/D converter to digitize the analog video signal in response to synchronization information embedded in the analog video signal. The resulting digitized frame samples are temporarily stored in the frame acquisition buffer and then transferred to system memory.
A digital video source (e.g. a digital camera) provides a digital video signal to the video board via the digital video port. Since the digital video signal already comprises a stream of digitized video frames, the A/D converter (of the video board) is bypassed and frame data is stored directly into the frame acquisition buffer.
Engineers and computer vision system integrators historically have taken advantage of a wealth of personal computer hardware and software products to develop computer vision systems. Personal computers are extremely flexible in their form and function and are adept at handling image acquisition and processing. Often it is necessary to link or coordinate a vision action or function with events external to the computer. Examples of events include receipt of a strobe pulse for lighting or a pulse from an infrared detector that indicates the position of a widget on an assembly line. Additionally, sometimes it is desirable not only to be able to act on external events, but also to control external events. As an example, if a widget on an assembly line is detected by a vision system to be defective, the vision system may be required to generate a pulse to control a motor to push the bad widget off the assembly line.
In a traditional PC environment, external events to the computer are typically monitored via a system of interrupts. FIG. 1 illustrates a traditional interrupt architecture. When an external action occurs, a device in the system detects the action and asserts one of the computer system interrupt lines. Upon detecting an asserted state on this line, a computer interrupt controller, managing several possible interrupting sources, notifies the CPU, based on priority, of the interrupt. The CPU then stops executing the current processing task, identifies the source of the interrupt and allocates processing time to an interrupt service routine assigned to that interrupt source. This routine then verifies the interrupt and disarms it, after which it then performs some reaction to that interrupt in the form of generating a programmatic response to the original condition.
One of the main problems with this interrupt-based system is that it does not work well when the original computer stimulus has real-time response requirements. As an imaging example, many times it is important for an external line, called a trigger, to immediately cause an acquisition to occur. As a widget passes down a high-speed assembly line it may trip a sensor indicating that the widget is directly below the camera lens. When the sensor is tripped, the image must be taken at that exact moment in time. If too much time passes, the widget may have traveled passed the point at which capturing an image of the widget is still useful.
In the traditional interrupt architecture, there is no way to guarantee an absolute amount of time after receiving the trigger from the sensor that an image acquisition could be made. The time until the interrupt service routine is called depends on what other interrupts are currently being serviced and even the number of other devices which share a common bus interrupt level. Even after the interrupt service routine is called, making sure that the interrupt is cleared and then taking an action oftentimes means arbitrating for and transmitting over the PCI bus or other computer bus. All of these actions take time. Even worse, this time is non-deterministic and hence varies from interrupt to interrupt. In other words, even if the computer reacts in an appropriate time, the widget may appear in different parts of the final image depending on how much time each of the individual traditional interrupt components takes.
Some designs have addressed some of these issues by allowing an external stimulus to drive a specific board action. This architecture is used on the PCI-1408 and PXI-1408 IMAQ (image acquisition) boards from National Instruments. In this model an external stimulus or trigger is designed to effect a specific action. On the 1408 board, when a trigger is received, the board can be programmed to immediately start an acquisition. This design allows the board to initiate a capture immediately, in real-time, based on an external stimulus. There is no variable latency involved in notifying the processor and waiting on an interrupt service routine. However, this improved architecture has one major drawbackxe2x80x94it has limited flexibility. One of the original strengths of the traditional computer interrupt architecture is its flexibility. If at first it is desired to start a video acquisition based on a trigger, but later other actions are desired, the interrupt architecture allows this change. However, hardware designs implemented to route triggers to specific actions are inflexible. For additional functionality these hardware designs must then fall back on traditional interrupt support for actions not specifically designed into the hardware.
Therefore, an improved system and method is desired for handling events in a video acquisition board. More particularly, an improved system and method is desired which enables the video acquisition board to respond to various types of hardware and software events in a deterministic and configurable manner with a minimal amount of extra hardware.
The present invention comprises a data acquisition (DAQ) system and method which includes an improved event architecture. In the preferred embodiment, the DAQ system is a video capture system. The video capture system preferably comprises a host computer coupled to a video source, such as a video camera. The host computer includes a CPU, a system memory, a peripheral bus, and a video capture board, also referred to as an image acquisition device, coupled to the peripheral bus of the computer which receives the video data from the video source. The image acquisition device includes an event architecture according to the present invention.
In the preferred embodiment, the image acquisition device includes event logic coupled to receive one or more external or internal events from event sources. The event logic comprises one or more event selectors and one or more event mappers. The event selectors each include a plurality of inputs and at least one output. For each event selector, the plurality of inputs are preferably each adapted to couple to a respective event source to receive an event signal. The event selectors operate to select one of the event signals and provide the selected event signal on an output to a corresponding event mapper. The corresponding event mapper receives the selected event signal and provides the selected event signal to one or more destinations, also referred to as destination hardware elements. In the preferred embodiment, each of the event selectors comprises one or more multiplexers, and each of the event mappers comprises one or more demultiplexers.
The destinations are operable to perform an action in response to receipt of the selected event signal. More particularly, the event selectors and the event mappers are configurable to provide an event signal from an event source to a selected destination, and the destinations are operable to cause an action to be performed by the image acquisition device in response to assertion of an event signal by an event source. The event logic is thus configurable to enable hardware processing of one or more events by one or more of said destination hardware elements for real time or determinable response requirements.
In the preferred embodiment, the image acquisition device comprises a board comprised in a computer system. In this embodiment, the image acquisition device further comprises an event interrupt combiner coupled to outputs of one or more of the event mappers. The event interrupt combiner receives one or more of the selected event signals output from the event mappers and generates a single interrupt signal which is provided to the computer system.